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Your search returned 21 records. Click on the hyperlinks to view further details of Titles.. |
Magazine Name : Ieee Transactions On Computers
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Year : 1988 Volume number : 37 Issue: 10 |
Maximum Alignment Of Interchangeable Terminals
(Article)
Subject:
Complexity
,
Interchangeable Terminals
,
Pla Routing
,
Terminal Alignment
Author:
Li-Shin
Lin
Sartaj
Sahni
page:
1166
-
1177
Nc Algorithms For Recognizing Chordal Graphs And K Trees
(Article)
Subject:
Parallel Algorithms
,
Chordal Graphs And K Trees
,
Nc Algorithm
Author:
N.
Chandrasekharan
Sitharama
Iyengar
page:
1178
-
1183
Bounding The Maximum Size Of A Packet Radio Network
(Article)
Subject:
Computer Networks
,
Diameter
,
Frequency Division
,
Multiplexing
Author:
Craig G.
Prohazka
page:
1184
-
1190
Dynamic Fault Reconfiguration In A Mesh-Connected Mimd Environment
(Article)
Subject:
Dynamic Fault Reconfiguration
,
Mesh
,
Mimd Systems
,
Near Neighbor Problem
Author:
Anthony P.
Reeves
M. Umit
Uyar
page:
1191
-
1205
Totally Self-Checking Checkers With Separate Internal Fault Indication
(Article)
Subject:
Modular Redundancy
,
Morphic Boolean Algebra
,
Self-Checking Morphic Blocks
,
Self-Checking Reduction Circuits
Author:
Nicolaos
Gaitanis
page:
1206
-
1213
The Cambridge Fast Ring Networking System
(Article)
Subject:
Bridges
,
Local Area Networks
,
Metropolitan-Area Networks
,
Vlsi
Author:
Andrew
Hopper
Roger M.
Needham
page:
1214
-
1223
Analytic Models Of Cyclic Service Systems And Their Application To Token-Passing Local Networks
(Article)
Subject:
Buffer
,
Cycle Time
,
Performance Analysis
,
Semi-Markov
Author:
Lionel M.
Ni
Vernon
Rego
page:
1224
-
1234
Tram: A Design Methodology For High-Performance, Easily Testable, Multimegabit Rams
(Article)
Subject:
Binary Tree Algorithms
,
Memory Testing
,
Vlsi Architectures
,
Design For Testability Of Ram'S
Author:
Dhiraj K.
Pradhan
Najmi T.
Jarwala
page:
1235
-
1250
Combining Queueing Networks And Generalized Stochastic Petri Nets For The Solution Of Complex Models Of System Behavior
(Article)
Subject:
Concurrent Tasks
,
Fork
,
Generalized Stochastic Petri Nets
,
Join
Author:
G.
Balbo
Steven C.
Bruell
Subbarao
Ghanta
page:
1251
-
1268
Performance Evaluation Of Nonrectangular Multistage Interconnection Networks
(Article)
Subject:
Bandwidth
,
Banyan Network
,
Packet Switching
,
Performance Evaluation
Author:
V
Cherkassky
page:
1260
-
1272
On The Vlsi Design Of A Pipeline Reed-Solomon Decoder Using Systolic Arrays
(Article)
Subject:
Pipeline
,
Systolic Arrary
,
Time Domain
,
Vlsi
Author:
Irving S.
Reed
Howard M.
Shao
page:
1273
-
1280
Design Of Self-Checking Sequential Machines
(Article)
Subject:
Logic Design
,
Self-Checking Systems
,
Sequential Machines
Author:
Sudhir
Dhawan
Ronald C.
De Vries
page:
1280
-
1284
Minimal Mesh Embeddings In Binary Hypercubes
(Article)
Subject:
Hypercube
,
Meshes
,
Minimal Embedding
,
Subgraph
Author:
Joe
Brandenburg
David S.
Scott
page:
1284
-
1285
On Embedding Rectangular Grids In Hypercubes
(Article)
Subject:
Dilation
,
Embedding
,
Expansion
,
Gray Code Properties
Author:
M.Y.
Chan
F.Y.L.
Chin
page:
1285
-
1288
A Functional Testing Method For Microprocessors
(Article)
Subject:
Fault Models
,
Functional Testing
,
K-Out-Of-M
,
Microprocessor
Author:
Li
Shen
Stephen Y.H.
Su
page:
1288
-
1293
Modular Decomposition Of Combinatorial Multiple-Values Circuits
(Article)
Subject:
Modular Design
,
Function Class
,
Function Decomposition
,
Multi-Valued Logic
Author:
Kwang-Ya
Fang
Anthony S.
Wojcik
page:
1293
-
1301
Linear Feedback Shift Register Design Using Cyclic Codes
(Article)
Subject:
Built-In Self-Test (Bist)
,
Lfsr
,
Test Pattern Generation
,
Pseudoexhaustive Testing
Author:
Edward J.
Mccluskey
page:
1302
-
1306
On Multidimensional Arrays Of Processors
(Article)
Subject:
Analysis Of Algorithms
,
Mesh-Connected Processor Arrays
,
Parallel Computational
,
Simulation
Author:
Mikhail J.
Atallah
page:
1306
-
1309
Timing Analysis Using Functional Analysis
(Article)
Subject:
Path Tracing
,
Testability
,
Timing Analysis
,
Functional Relationships
Author:
V
Iyengar
page:
1309
-
1314
On Subsequences Of Arithmetic Sequences
(Article)
Subject:
Fraction
,
Linear Feedback Shift Registers
,
Arithmetic Sequences
,
Subsequences
Author:
David M.
Mandelbaum
page:
1314
-
1315
Modified-Mesh Connected Parallel Computers
(Article)
Subject:
Connected Component
,
Parallel Algorithms
,
Prefix-Sums Computation
,
Pyramid
Author:
David A.
Carlson
page:
1315
-
1321
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